|
|
今日热门资讯
theros(Nasdaq: ATHR), a leading wireless chip design company among theglobe, is now hiring some guys in mainland due to solid businessdevelopment today.
Atheros now has 6 open positions aimed to graduates in Shanghai site. See them below.
Please send your resume with position title to noagain#hotmail.com. Hint: Replace the # to @.
For more company information, please refer to http://www.atheros.com/.
-------------------------------
Thank you for your attention.
-------------------------------
ASIC Design Engineer (Logic) –
QUALIFICATION (DETAIL):
Education:
MS in Electrical/Electronics Engineering
Experience:
Academic background with Electrical Engineering, MS preferred
Good Knowledge of semiconductor electronics, logic design, circuit theory
Programming skills in C and/or PERL
Good communication skills and proven ability to work well within teams
Verilog and Synopsys experience is a plus
DESCRIPTION OF FUNCTION & RESPONSIBILITY:
ASIC Design for Ethernet communication products
Micro Architecture, Logic design
RTL coding, verification, emulation, synthesis, timing close-up, chip DVT
System Hardware Design –
QUALIFICATION (DETAIL):
Education:
MS in Electrical/Electronics Engineering
Experience:
Academic background with Electrical Engineering, MS preferred
Good Knowledge of circuit / logic design
Fundamental software / mechanical knowledge
Good communication skills and proven ability to work well within teams
Board / PCB design tools, FPGA experience is a plus
Capability to troubleshoot and solve problem
DESCRIPTION OF FUNCTION & RESPONSIBILITY:
System hardware design for Ethernet communication products
Evaluation / test / emulation board design
Circuit design, PCB layout
ASIC Design Engineer (MBU/EBU) –
QUALIFICATION (DETAIL):
Education:
MS in Electrical/Electronics Engineering
Experience:
Oneyear experience with Verilog programming, logic synthesis and gatetiming. A proven record of delivering successful ASIC's to the marketis preferred.
One or more advantages as following are highlydesirable: A strong background in digital communication, signalprocessing and networking protocols; IC Design experiences in wirelesscommunications and audio processing; Experiences with ARM/DSP, AHB busand External interface development.
Good communication skills in English.
Familiar with ASIC design flow
Good knowledge of IC design backend flows.
Experiencesin IC life-cycle from conception, design, verification, top-levelnetlist with pads to tape-out, chip-testing and mass-production is aplus.
FPGA, PCB or embedded SW skill is a plus.
DESCRIPTION OF FUNCTION & RESPONSIBILITY:
TheDigital Design Engineer will be responsible for designing ASIC's. Youwill work closely with our architecture/algorithm engineers to exploreideas for next generation products and then develop RTL to tern theseideas into customer solutions.
Chip features specification and RTL design
Synthesis, verification, timing.
FPGA emulation, lab validation and debugging.
DSP senior design Engineer –
QUALIFICATION (DETAIL):
Education:
New graduates with MSEE.or Ph.D degrees major in digital communications (Ph.D from top universities preferred).
Experience:
Strong academic background of digital communication theory with proficient Matlab/C programming and simulation skills.
Extensive verilog RTL experience including design, verification, synthesis, and debugging.
Proficiency of Xilinx FPGA prototyping.
Solidhands-on experience of using different lab equipment such asoscilloscopes, logic analyzer, signal generator, spectrum analyzer, etc.
Fluency in English reading and writing.
IEEE 802.3 or previous Ethernet product development experience is a plus.
DESCRIPTION OF FUNCTION & RESPONSIBILITY:
Thecandidate will join a team of algorithm design and FPGA prototypinginvolved in the development of advanced digital signal processingalgorithm for the physical layer of high speed wired data communicationIC.
Design and develop PAM/QAM single/Multi-carrier transceivers,multi-input adaptive equalizers/echo cancellers, multi-dimentionaltrellis encoder/decoder, timing recovery, digital filters, interfacewith analog blocks and MAC/switch blocks.
Create bit-exact Matlab/C system model and perform simulation.
Design and simulate verilog RTL code using synopsys and cadence EDA tools.
Prototype, debug and verify RTL code on Xilinx multi-FPGA platform.
Perform coding, synthesis, timing closure, placement and route on FPGA…
Software Engineer (WLAN) -
QUALIFICATION (DETAIL):
Education:
BS/MS Computer Science or Electrical engineering
Experience:
2+ years hands-on design/development experience in Linux/VxWorks and/or other embedded operating systems.
Excellent C programming, assembly language programming experiences
Experiencewith design and development of various data interface device drivers,Layer 2 (Data Link/MAC level) protocols and networking software
Experience in hardware bringup, BSP development for MIPS, ARM family processors,
Knowledge of embedded debugging environment tools such as in-circuit emulator and logic analyzer.
Team player with excellent communication and interpersonal skills
Strong analytical and problem solving skills
DESCRIPTION OF FUNCTION & RESPONSIBILITY:
Tobe part of the core WLAN engineering team to contribute to design,implementation and testing of wireless networking products. Thisindividual will be working on developing board support package, lowlevel device drivers, and network drivers.
Software Engineer (MBU)-
QUALIFICATION (DETAIL):
Education:
Bachelor or Master degree in Software Engineering, Computer Science, or related field
Experience:
Interface with the ASIC teams on chip features and programming model
Develop and maintain key features for Bluetooth software on an embedded OS, a Linux and/or Windows OS platform;
Support software releases during test and release cycles;
Experience with wireless drivers and/or other networking drivers
Knowledge of networking protocols and security concepts
Bluetooth development experience is highly desired
Familiarity with hardware debugging
Experience in release processes, build and packaging
Excellent verbal and written communication skills
Experience with embedded platform development
Experience with full software life cycle and delivery mechanisms
Knowledge of multi-threading and synchronization in a driver environment
Strong understanding of OS kernel internals
Product architecture, design, implementation and testing experience
Ability to work independently with minimal supervision
DESCRIPTION OF FUNCTION & RESPONSIBILITY:
Interface with the ASIC teams on chip features and programming model
Develop and maintain key features for Bluetooth software on an embedded OS, a Linux and/or Windows OS platform
Support software releases during test and release cycles |
|
